Teknikal-Notes

A basic notes by example for VHDL

------------------Standard data type-------------------
Signal a: BIT;
signal a: BIT_VECTOR(7 downto 0);
Signal a: BOOLEAN; --true & false
Signal a: BOOLEAN_VECTOR(7 downto 0);
-- -(2^31 -1) --> (2^31-1)
Signal a: integer range 0 to 15; -- -2ti -> 2ti
Signal a: natural range 0 to 15; -- 0 -> 2ti (32 bit)
signal a: positive range 1 to 16; -- 1 -> 2 ti (32 bit)
(integer_vector: VHDL 2008)
signal a: character; -- 'a','b','c',..,'NUL',
signal a: string(1 to 4); -- "VHDL"
--other type: REAL, REAL_VECTOR, TIME, TIME_VECTOR
--------------Standard-logic data type------------------
-- U,X,0,1,Z,W,L,H,-  : -: don't care
signal a: std_logic;
signal a: std_logic_vector(15 downto 0);
------------------ Signed/Unsigned ---------------------
signal a: signed(7 downto 0);
-----------------------Operators------------------------
NOT, AND, NAND, OR, NOR, XOR, XNOR
+,-,*,/, abs, rem, mod, add_carry
=,/=,>,<,>=,<=,maximum, minimum
sll,srl,sla,sra,ror,rol -- x ssl a --a: integer
shift_left,shift_right
to_unsigned, to_signed, to_slv (to_stdlogicvector),
to_integer,to_real, to_string
concatenation: &
others => '0';
--Note: numeric_bit: unsigned/signed(base=BIT)
--Note: numeric_std: unsigned/signed(base=std_logic)
---------------User-Defined Scalar Type-------------------
Type temperature is range 0 to 273; --integer types
Type state IS (S0,S1,S2); -- enumerated type
signal a: temperature;
signal state: machine_state;
---------------User-Defined Array Type-------------------
Type int_type1 is array (positive range <>) of integer;
constant const1: int_type1(1 to 4):=(1,2,3,4,5);
Type int_type2 is array(1 to 2) of int_type1;
constant const2: int_type2(1 to 2) :=((1,2,3,4),(2,3,4,5));
Type enu_type1 is array(7 downto 0) of std_logic;
constant const3: enu_type1 := ("10101010");
Type enu_type2 is array(1 to 4) of std_logi_vector(7 downto 0);
Type enu_type3 is array(1 to 3, 1 to 4) of BIT;
constant const4: enu_type3 := (("0000","0000","1111"));
--------Record: collection of different types------------
Type memory_access is record
 address_: integer range 0 to 255;
 block_: integer range 0 to 3;
 data: bit_vector(15 downto 0);
end record;
variable a: memory_access:=(12,1,X"0000");
a.address_ = 13;
------------------- Type conversions ----------------------
--qualified expression: resolve ambiguous situations
sum <= a + unsigned'(1000); --type_name'(expression)
sig <= signed(slv); --type casting
slv <= std_logic_vector(sig); -- type casting: unsigned
-- std_logic_vector <-> signed/unsigned <-> integer
---------------------- Attribute  -------------------------
'LEFT; 'RIGHT;'LOW;'HIGH; 'EVENT; 'POS; 'RANGE;'LENGTH
-------------------concurrent statements--------------------
x <=  '0' when rst = '0' else
  '1' when rst = '0' and a = '1' else
  '-'; --dont' care
with control select
 x <=  '0' when '0',
   '1' when '1',
   'z' when others;
gen: for i in 0 to 7 generate  
  x(i) <= a(i) XOR b(i);
end generate;

gen: if a=b generate
end generate;
-------------------sequential statements--------------------
if condition then
 ...
elsif (...) then
 ...
else
end if;

case data is
 when "000" => count := count + 1;
 when "001" => count := count + 2;
 when others => count := 0;
end case;

clk'event and clk = '1'
wait until (clk'event and clk = '1') --wait until condition;
wait on clk; --wait on sensitivity_list;
wait for 10 ns;
loop -- unconditional loop
 wait until clk ='1';
 count := couint + 1;
end loop;

for i in 0 to 5 loop -- i in data'range loop
 count := count + 1;
end loop;

while (i < 10) loop
 count := count + 1;
end loop;

EXIT; --exit when condition
next when i=skip; -- next when condition
-------------------------------------------------

Advantages of SPI

1. Full duplex communication
2. Higher throughput than I²C protocol
3. Not limited to 8-bit words in the case of bit-transferring
4. Arbitrary choice of message size, contents, and purpose
5. Simple hardware interfacing
6. Typically lower power requirements than I²C due to less circuitry.
7. No arbitration or associated failure modes.
8. Slaves use the master's clock, and don't need precision oscillators.
9. Transceivers are not needed.
10. At most one "unique" bus signal per device (CS); all others are shared

Disadvantages of SPI

1. Requires more pins on IC packages than I²C
2. No in-band addressing. Out-of-band chip select signals are required on shared busses.
3. No hardware flow control
4. No slave acknowledgment
5. Multi-master busses are rare and awkward, and are usually limited to a single slave.
6. Without a formal standard, validating conformance is not possible
7. Only handles short distances compared to RS-232, RS-485, or CAN.

Teknikal-Notes

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Basic notes for circuit-level VHDL

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Những điểm mạnh và yếu của SPI (Serial Peripheral Interface)